The present invention relates generally to the bulk packaging of integrated circuits. More particularly, the invention relates to the use of leadless packaging processes and designs that utilize a conductive substrate.
A leadless leadframe package (LLP) is a relatively new integrated circuit package design that contemplates the use of a metal (typically copper) leadframe type substrate structure in the formation of a chip scale package (CSP). As illustrated in FIG. 1, in typical leadless leadframe packages, a copper leadframe strip or panel 101 is patterned (typically by stamping or etching) to define a plurality of arrays 103 of chip substrate features 105. Each chip substrate feature includes a die attach pad 107 and a plurality of contacts 109 disposed about their associated die attach pad 107. Very fine tie bars 111 are used to support the die attach pads 107 and contacts 109.
During assembly, dice are attached to the respective die attach pads and conventional wire bonding is used to electrically couple bond pads on each die to their associated contacts 109 on the leadframe strip 101. After the wire bonding, a plastic cap is molded over the top surface of the each array 103 of wire bonded dice. The dice are then singulated and tested using conventional sawing and testing techniques.
FIG. 2 illustrates a typical resulting leadless leadframe package. The die attach pad 107 supports a die 120 which is electrically connected to its associated contacts 109 by bonding wires 122. A plastic cap 125 encapsulates the die 120 and bonding wires 122 and fills the gaps between the die attach pad 107 and the contacts 109 thereby serving to hold the contacts in place. It should be appreciated that during singulation, the tie bars 111 are cut and therefore the only materials holding the contacts 109 in place is the molding material. The resulting packaged chip can then be surface mounted on a printed circuit board or other substrate using conventional techniques.
Although leadless leadframe packaging has proven to be a cost effective packaging arrangement, there are continuing efforts to further improve the package structure and processing to reduce production costs, improve production efficiency and/or improve production yields.
To achieve the foregoing and other objects and according to the purpose of the present invention, an improved method of packaging integrated circuits in a leadless package is disclosed. A conductive substrate sheet is initially patterned to form troughs that define a multiplicity of device areas. Each device area includes a plurality of contact landings (and preferably a die attach pad) that are formed in the substrate sheet by patterning. The patterning can be done using a variety of conventional techniques (e.g. etching). A multiplicity of dice are then attached to the substrate sheet and bond pads on the dice are electrically connected to associated contact landings using conventional techniques such as wire bonding. The substrate sheet serves to support the contacts (and die attach pad) during the bonding. One or more caps are then molded over the device areas to encapsulate the dice and bonding wires and to fill the troughs. After the caps have been formed, excess portions of the substrate sheet (e.g. portions below the troughs) are removed to electrically isolate the contact landings thereby forming electrically isolated independent contacts in a molded package. In the resulting arrangement, the molding material serves to hold the contacts in place as well as to electrically isolate the independent contacts.
The excess substrate material can be removed using a variety of techniques including mechanical grinding and chemical etching and/or a combination of the two. It should be appreciated that in the described arrangement, the xe2x80x9cexcessxe2x80x9d substrate material serves to prevent the formation of flash below the contacts during the molding operation. The xe2x80x9cexcessxe2x80x9d substrate material also supports the die attach pad and the contacts during both wire bonding and the die attach process.
In an apparatus aspect of the invention, it is believed that the intermediate patterned substrate sheet is a novel structure and that the matrix based packaging of devices using such a substrate is also new.